1. Field of the Invention
This invention relates to an automatic focusing device having a distance measuring device to be used for a camera or the like and, more particularly, to an automatic focusing device having an active type distance measuring device which is arranged to project a light flux onto an object to be photographed.
2. Description of the Prior Art
The conventional active type distance measuring devices used for automatic focusing devices to which this invention is suitably applicable can be divided into a peak detecting type and a differential type.
Referring to FIG. 1 of the accompanying drawings, the peak detecting type distance measuring device is arranged as follows: In association with the movement of a lens group 1 which participates in focal point adjustment among the lens elements of a photo-taking lens, a light projecting element 2 which is an IRED or the like is arranged to project near infrared rays via a light projection lens 3 toward a photo-taking object 4 in such a way as to scan the object with a projected light spot image 7 until it comes to a position 7' by continuously moving the light projecting element 2 to a position 2'. Then, the reflection light of the projected light is received via a light receiving lens 5 by a light receiving element 6 which is an SPC or the like. With the reflection light thus detected by the light receiving element 6, the lens group 1 is stopped from moving. Assuming that an image 8 of the light receiving element 6 which is projected on the object 4 by the light receiving lens 5 is formed at a point 8, an electrical output occur when the projected light spot image 7 begins to overlap the projected image 8 of the light receiving element 6 on the object 4. Then, the relation between this electrical output and a scanning angle .THETA. of the light projecting element 2 presents a characteristic as shown in FIG. 2. A distance to the object 4 from the distance measuring device or the camera is obtained, according to the principle of the trigonometric distance measurement, from the scanning angle .THETA.1 of the light projecting element 2 obtained when the electrical output reaches its peak value and also from the distance between the light projecting lens 3 and the light receiving lens 5.
As to the differential type distance measuring device, the devices of this type have been disclosed in Japanese Patent Publication No. SHO 56-54610 (corresponding to United Kingdom Pat. No. GB 2019152B), Japanese Patent Publication No. SHO 59-809 (United Kingdom Pat. No. GB 2027313B), etc. In addition to them, a previous U.S. patent application Ser. No. 603,660, filed Apr. 26, 1984 with some of the coinventors of the present invention participating therein also discloses a device of this type. Referring to FIG. 3, the operating principle of the differential type is as follows: A light receiving element 10 is divided into two areas A and B. Distance measurement is carried out by a difference between signals obtained from these two areas A and B. An image 11 of the light receiving element 10 which is projected on a photo-taking object 4 by a light receiving lens 5 is also divided into areas 11A and 11B. In the case of this type, the scanning position of the light projecting element 2 is related to the moving position of a lens group 1 which participates in focal point adjustment In the event that the in-focus distance of the lens is nearer than the distance to the object 4, as indicated by a one-dot-chain line 1', the projected light spot image of the light projecting element 2 is in a position I which is located more on the side of lower area 11A relative to the middle border line between the areas 11A and 11B as viewed on the drawing. Conversely, when the in-focus distance of the lens is farther than the object distance as indicated by another one-dot-chain line 1", the projected light spot image of the light projecting element 2 is in another position III which is located more on the side of the higher area 11B relative to the border line. In this instance, assuming that the outputs from the two areas A and B of the light receiving element 10 are VA and VB, the device is arranged to have them in a relation of VA&gt;VB when the lens is in a near-focus state, in a relation of VA&lt;VB in the event of a far-focus state and in a relation of VA=VB with the lens in an in-focus state. In an actual practical device, there is provided some additional arrangement such as a dead zone VD for removing a noise component of the output in such a manner that the lens is in an in-focus state when there obtain a relation of .vertline.VA-VB.vertline..ltoreq.VD, in a near-focus state when the relation is VA-VB&gt;VD, and in a far-focus state in the event of VA-VB&lt;-VD.
In the case of FIG. 3, the light projecting element 2 is arranged to perform a scanning operation in association with the movement of the lens group 1 while the light receiving element is arranged to be stationary. However, besides this arrangement, there have been known different arrangements wherein the light projecting element 2 is arranged to be stationary while the light receiving element 10 is arranged to perform a scanning operation in association with the lens group 1; or wherein, for the purpose of always measuring the distance of the middle part of a photographing picture to avoid a parallax, both the light receiving and light projecting elements are arranged to perform scanning in association with the movement of the photo-taking lens.
For determining the in-focus, near-focus or far-focus state as mentioned above, there have been proposed various methods. An example of these methods is as shown in FIG. 4. In this method, weak signals obtained from the areas A and B of the light receiving element 10 are respectively subjected to amplifying, detecting and integrating processes before they are produced as outputs VA and VB. The outputs VA and VB which correspond to the positions I, II and III shown in FIG. 3 are respectively indicated as VAI, VBI, VAII, VBII, VAIII and VBIII. In this instance, the outputs VA and VB are compared with a predetermined level VH. When either one of the outputs VA and VB reaches the level VH, the value of the other output is detected. Then, the lens is determined to be in focus when a difference between the two outputs VA and VB is less than a predetermined level and to be out of focus when the difference is above the predetermined level.
Another example of the determining methods of the prior art is as shown in FIG. 5. The most salient difference of this method from that of FIG. 4 resides in that: Instead of comparing the outputs VA and VB with a predetermined level, the values of .vertline.VA-VB.vertline. and VA+VB are obtained and the values thus obtained are compared with predetermined levels. More specifically, an in-focus state is considered to have been attained when the value .vertline.VA-VB.vertline. is below a predetermined level VD while the value VA+VB has reached a predetermined level VH. When the value .vertline.VA-VB.vertline. reaches the predetermined level VD before the value VA+VB reaches the predetermined level VH, the lens is determined to be out of focus.
FIG. 6 shows in a block diagram an automatic focusing device of the differential type employing the determining method of FIG. 5. When a start switch, which is not shown, is turned on, a microcomputer 27 supplies a light projecting element driving circuit 12 with a synchronizing signal which determines a light emission period. The circuit 12 then causes a light projecting element 2 to emit a pulse light toward an object to be photographed. The object reflects the light. The reflected light is received by a light receiving element 10 which is divided into areas A and B. The areas A and B then produce outputs which are respectively amplified and detected by amplification-and-detection circuits 20 and 21 according to a synchronizing signal which is supplied from the microcomputer 27 for synchronous detection. After that, these outputs are integrated by integrators 22 and 23. Integrated outputs VA and VB are computed by an adder 24 and a differentiator 25 to obtain values VA+VB and .vertline.VA-VB.vertline. respectively. These values are compared at a comparison circuit 26 with predetermined level values VH and VD respectively. The microcomputer 27 then determines a near-focus state, a far-focus state or an in-focus state of the basis of the result of the comparison. The microcomputer instructs a motor driving circuit 28 according to the result of determination. The motor driving circuit 28 drives a motor 29 to move a lens group 1. The movement of the lens group 1 then causes, via a cam or the like, the light projecting element 2 to perform scanning. Then, a distance measuring operation comes to an end.
FIGS. 19 to 27 show the details of the amplification-and-detection circuits 20 and 21, the integrators 22 and 23, the adder 24, the differentiator 25, the comparison circuit 26 and the microcomputer 27. Referring to FIGS. 19 to 27, the details of these circuits are as described below:
The electrical circuit arrangement of the device described above is as shown in FIG. 19. The reflected light spot image received at the areas A and B of the light receiving element 10 as mentioned in the foregoing is photoelectric converted into light information signals. The light information signals thus obtained are supplied to and sufficiently amplified by amplification circuits 20a and 21a. The amplifiers 20a and 21a are preferably arranged to have sufficient amplification degrees for the infrared rays forming the projected light spot image and to have a frequency characteristic suppressing as much as possible the amplification degree for the frequency of such modulating light as unnecessary sunlight or commercial light sources. The outputs of these amplifiers are applied to synchronous detection circuits 20b and 21b and are subjected to synchronous detection. In this instance, the synchronizing signal is of the same frequency as that of a light emission driving signal for the light projecting element 2 and is in a predetermined phase relation thereto. The outputs of the synchronous detection circuits are integrated by integrators 22 and 23 and increase every moment at a rate proportional to the signal intensity of the reflected light spot image. The integrated voltages VA and VB which are thus obtained separately from the integrators 22 and 23 through the above-stated signal processing operation are processed and determined by a computing circuit which will be described later herein and are thus converted into digital information signals consisting of some bits.
More specifically stated, the integrated voltages VA and VB are made into a difference signal VA-VB by means of a subtracter 25a and into a sum signal VA+VB by means of an adder 24. The difference signal VA-VB is applied to an absolute value circuit 25b to obtain a signal .vertline.VA-VB.vertline.. The value of this signal .vertline.VA-VB.vertline. is compared at a comparator 26a with a comparison value VD and the result of comparison is produced from the comparator 26a. The sum signal VA+VB is compared respectively at level detecting comparators 26b and 26c with comparison values VL and VH and the results of comparison are produced from these comparators 26b and 26c. Meanwhile, the integrated voltages VA and VB are compared as they are at another comparator 26d. The four digital information signals which are thus obtained including the outputs DD, LL, HH and AB of the comparators 26a, 26b, 26c and 26d are supplied to a sequence control circuit 27 and the operation of the whole system is determined there.
A light projecting element driving circuit 12 is arranged to supply a current to the light projecting element 2 in synchronism with a synchronizing signal from the control circuit 27 and controls light emission from the light projecting element 2.
A motor driving circuit 28 is arranged to control the direction are speed of rotation of a photo-taking optical system driving motor 29 in accordance with a signal coming from the control circuit 27. FIG. 20 more specifically shows the circuit arrangement of a part C shown in FIG. 19.
Referring to FIG. 20, in the part C of the circuit of FIG. 19, low-noise operational amplifiers 201a and 201b are disposed at the initial stages of the amplifiers 20a and 21a. Feedback circuits 202a and 202b are arranged to give a by-pass characteristic. Some portion of the energy of the infrared rays projected from the light projecting element 2 is reflected and returned back to the light receiving element 10 together with some external light component. It is likely that this external light component may be of a large value compared with the returned energy. In combination with the use of a visible light cutting filter FL, these feedback circuits 202a and 202b serve to relatively suppress the external light component. These circuits can be so arranged as to be practicable to obtain the suppressing effect under most of object conditions. Further, the DC component due to sunlight, etc. is almost completely cut by means of capacitors 203a and 203b. AC amplifiers 204a and 204b are arranged to sufficiently amplify the components in the proximity of modulation frequency before the signals are supplied to the synchronous detection circuits disposed at the next stage. The synchronous detection circuits 20b and 21b shown in FIG. 19 are composed of inverters 205a and 205b, analog switches 206a and 206b and other analog switches 207a and 207b. The analog switches 206a, 206b, 207a and 207b are operated by means of a synchronizing signal SYNC to alternately select non-inverted signals and inverted signals.
In another example, a method of obtaining the product of the input signal and the AC component of the synchronizing signal SYNC by means of a four-phenomenon analog multiplier may be employed in place of the above arrangement.
The synchronously detected signals become direct currents (pulsating currents) and are supplied to the integrators 22 and 23 of the next stage.
Each of the integrators 22 and 23, consists of an operational amplifier 208a or 208b and a capacitor 210a or 210b. Currents which are proportional to the voltages of the synchronous detection outputs flow via resistors 209a and 209b to the capacitors 210a and 210b to be stored there. Then, these currents become integrated voltages and are produced from the operational amplifiers 208a and 208b. These voltages correspond to the voltages VA and VB mentioned in the foregoing. Analog switches 211a and 211b are arranged to make the electric charges stored at the capacitors 210a and 210b into their initial states. These electric charges stored at the capacitors 210a and 210b are thus cleared in response to a clear signal CLR from the control circuit 27 for a next electric charge storing process.
FIG. 21 shows in more detail the part D of the circuit of FIG. 19 wherein the integrated voltages VA and VB are processed to obtain a signal .vertline.VA-VB.vertline. which is compared with the comparison voltage VD. The integrated voltages VA and VB produced from the integrators 22 and 23 are subjected to a subtraction process at a subtraction circuit 25a consisting of resistors 213-216 each of which is of the same resistance value R as an operational amplifier 212. A signal -VA+VB is obtained through this process. This value signal is applied to the absolute value circuit 25b of the next stage. The absolute value circuit 25b consists of an operational amplifier 217, diodes 218 and 219, resistors 220, 221 and 222 which are of a resistance value 2 R and another resistor 223 which is of a resistance value R. The operational amplifier 217, diodes 218 and 219 and resistors 220 and 221 are so arranged that the cathode of the diode 219 comes to have a high impedance upon receipt of a negative input and to have a potential which is -1 times as high as an input voltage upon receipt of a positive input. As a result, a voltage of value -0.5 .vertline.VA-VB.vertline. is applied to the negative input terminal of a comparator 224. With a voltage of value -0.5 VD having been applied to the positive input terminal of the comparator 224 beforehand, the value .vertline.VA-VB.vertline. and the value VD are compared with each other. Let us assume that a value obtained as the result of this comparison is DD.
FIG. 22 shows in more detail the part E of the circuit of FIG. 19. The integrated voltages VA and VB are added up by resistors 225 and 226 of a resistance value R and a signal of a value 0.5 (VA+VB) is applied to each of the positive input terminals of comparators 227 and 228. Meanwhile, the negative input terminal of each of these comparators 227 and 228 has a signal of value 0.5 VL or 0.5 VH applied thereto. These comparators thus compare the value (VA+VB) with the values VL and VH and produce comparison outputs of values LL and HH respectively.
FIG. 23 shows in more detail the part F of the circuit of FIG. 19. In this part, the integrated voltages VA and VB are directly compared with each other by means of a comparator 229, which then produces a comparison output of a value AB.
FIG. 24 shows by way of example another method for obtaining the comparison value DD from the integrated voltages VA and VB. In this case, the voltages VA and VB are applied to the positive input terminals of comparators 230 and 231 and are further applied via resistors 232 and 233 of a resistance value R to the negative input terminals of these comparators 230 and 231. Meanwhile, these negative input terminals are also connected to constant current sources 234 and 235. Such being the arrangement, these negative input terminals have voltages VB+iR and VA+iR applied thereto respectively. (NOTE "i" represents the current value of the constant current sources 234 and 235). The outputs of the comparators 230 and 231 are supplied to an OR circuit 236 which then produces the output (or the comparison value ) DD. This output DD becomes true logic in case of VA-VB&gt;iR=VD or VB-VA&gt;iR=VD and represents logic in the event of .vertline.VA-VB.vertline.&gt;VD.
FIG. 25 shows a case where a part of the sequence control circuit 27 is embodied by hardware means. A clock CL is arranged to determine the minimum period of the sequence control circuit 27 and serves as source of a signal for modulation of light emission of the light projecting element 2 and the synchronizing signal SYNC for the synchronous detection circuits 20b and 21b. A counter 236 is arranged to count an n-number and to produce an output Cn which determines the period and the maximum integration time for distance measurement. Flip-flops 237 and 238 are arranged to be set respectively by the signals DD and HH and to be reset by the signal Cn at every period of distance measurement. The outputs DDQ and HHQ of the flip-flops 237 and 238 are integration terminating signals. These signals DDQ and HHQ are supplied via an OR circuit 239 to a flip-flop 240 to be held there according to the period of the signal Cn. The inversion output Q of the flip-flop 240 becomes an infinity signal FAR. The signals FAR and DDQ come via an OR circuit 241 to set a flip-flop 242, which then produces a motor rotation signal MO. This flip-flop 242 is also arranged to be reset by the integration terminating or in-focus signal HHQ. When there obtains an in-focus state, the motor rotation signal MO is inhibited from being produced and the motor 29 is thus brought to a stop. The signal AB is renewed into a signal ABQ at a flip-flop 243 by the signal DDQ which represents an out-of-focus state. In this instance, the signal AB becomes true logic in the event of a near-focus state, i.e. in the case of VA&gt;VB. The signals ABQ and FAR become a signal FN indicative of the rotating direction of the motor via an OR circuit 244. A final motor driving signal FF (in the direction of an infinity distance position) or NN (in the direction of a nearest distance position) is selected according to the output of an AND circuit 245 which received the signals FN and MO or the output of an AND circuit 247 which receives the signal FN via a NOT circuit 246 and the signal MO.
In case that both the signals DDQ and HHQ are of false logic and are supplied via the OR circuit 239 and NOT circuit 248 to an AND circuit 249, the synchronizing signal SYNC is produced in synchronism with the output CLK of the clock CL which is supplied to the AND circuit 249 in that case. An integration resetting signal CLR produced from an OR circuit 250 becomes true logic and so remains until resumption of a next integrating process after termination of integration is decided jointly by the output of the OR circuit 239 and the signal Cn supplied to the OR circuit 250.
FIG. 26 shows wave forms of signals of FIG. 25 observed when focused state changes as follows: A near-focus state.fwdarw.a far-focus state.fwdarw.an in-focus state.fwdarw.an infinity distance state. In the event of a near-focus state, the signal DD first rises. At this instant, the signal AB is at a high level. In the event of a far-focus state, the signal DD also first rises while the signal AB is at a low level. In case of an in-focus state, the signal HH rises. In case of an infinity distance state, the end of a maximum integration time comes before none of the signals come to rise.
FIG. 27 shows an example wherein a microcomputer is used for the sequence control circuit 27 to accomplish control with soft-ware arrangement employed in a part of the device according to the invention. In this drawing are also shown by way of example a light projecting element driving circuit 12 for the light projecting element 2 and a motor driving circuit 28. A reference numeral 251 denotes the microcomputer. (The microcomputer may be selected from commercially available products such as a model NO. MN 1453AX manufactured by Matsushita Electronics Industries Co., Ltd.) The input terminals of the microcomputer 251 receive the above-stated signals DD, AB, LL and HH. From the output terminals of the microcomputer 251 are produced the signals SYNC, CLR, FF and NN. Further, a signal LOW for the motor rotation speed control, etc. can be readily added to these signals.
In the case of an active type distance measuring device which is arranged as described in the foregoing, the in-focus determination is made according to a reflection light resulting from a projected light. In cases where the reflection factor of the object is low or where the object distance is far, therefore, the reflection light cannot be received in sufficient intensity or quantity. It has been therefore impossible in such cases to perform distance measurement. In these cases, the insufficient reflection light component of a signal thus obtained results in deterioration of the S/N ratio of the signal. In the case of the peak detecting type distance measuring device which is arranged as shown in FIGS. 1 and 2, the output signal thus obtained becomes as shown in a graph "a" in FIG. 7 and does not clearly show a peak. In the case of the differential type which is arranged as shown in FIGS. 3 to 6, the value VA+AB remains below the value or level VH and the value .vertline.VA-VB.vertline. below the value or level VD even after the lapse of a maximum integration time T0. In that instance, the output signal is considered to be in a state as shown in FIG. 8. Again referring to FIGS. 7 and 8, a level VT which is shown in these drawings is set with a noise, etc. taken into consideration. When a peak value detected by the peak detecting type device is below the level VT, the peak value is not considered to be a peak value. In the case of the differential type device also, when a value 1/2 (VA+VB) is below the level VT after the lapse of the maximum integration time T0, the object is determined to be located at a far distance. Further, in case of a differential type device arranged to perform the determining operation according to the method of FIG. 5, the above-stated set level may be considered to be VT=(VH)/2.
Heretofore, in the event of a low level of the reflection light as mentioned above, the majority of the active type automatic focusing devices of the kind described are arranged to have the lens stopped in an infinity distance focusing position, a hyper focal distance focusing position or the like. However, in the event of the insufficient reflection light component as mentioned above, the arrangement to bring the lens in the infinity distance focusing position or the like has fialed to give an adequate image for an object which is of a low reflection factor and is located at a near distance.